Fig. 4

Structure of the proposed instrument. The instrument’s architecture includes: (a) a high-performance, eight-channel (five channels on the main board and another three channels on a stacked PCB that is adjusted on the two headers shown in the picture) AFE, (b) an analog, low-power 3-axis accelerometer, (c) an eight-channel, 24-bit ADC, (d) an FPGA module, (e) a 2 MBps Zigbee transceiver, and (f) a 2.4 GHz antenna